← All IntelClip / EntertainmentKV cache limits batch size
From Why LLM Inference Is Memory-Bound (Julia Turc) · ≈13:05
“While the goal of batching is to ease memory bandwidth pressure, its gains are partially offset by the KV cache.”
“For instance, the vLLM inference engine came up with paged attention, a mechanism inspired by traditional operating systems to reduce memory fragmentation.”
What’s in it
- Understand what the KV cache is and why it lives in HBM
- See how KV cache growth limits batch scaling and GPU utilization
- Learn how vLLM's paged attention cuts memory fragmentation
Clip transcript
Remember, auto regressive models make predictions based on the past. So to compute the next token, we need to cache activations from the previously generated tokens. This is called the KV cache. K stands for keys, V stands for values. These are activations specific to the Transformer architecture. The KV cache holds an entry for every previously generated token in the batch. Because of its size, it must be stored in the HBM. During a forward pass, the relevant keys and values are streamed all the way to the processor, alongside the model weights. But as the batch grows, so does the KV cache. While the goal of batching is to ease memory bandwidth pressure, its gains are partially offset by the KV cache. Because of this, we often cannot scale batch sizes enough to keep the processor fully busy. Now there are further optimizations to ensure memory is used effectively and accommodates for as much data as possible. For instance, the vLLM inference engine came up with paged attention, a mechanism inspired by traditional operating systems to reduce memory fragmentation. But ultimately, memory capacity and bandwidth are still finite and so is the maximum batch size. We are reaching a point where system level engineering optimizations have
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